First Look:

Sony works on magnetic RAMs as universal mobile memory

By Bernard Cole
iApplianceWeb
(12/22/05, 3:54 AM GMT)

Tokyo, Japan – Reflecting the demand within connected mobile and embedded computing for a non-volatile, low power memory with densities, read and write times equal to  traditional SRAMs and DRAMs, researchers at Sony are working on next generation devices that go a long way in that direction.

At the just held International Electron Devices Meeting (IEDM), researchers from Sony Corp. showed off details of their work based on technology based on spin-torque-transfer magnetic RAMs with the aim of coming up with a universal memory that would replace not only flash, but DRAM and SRAM as well.

Currently, magnetic RAM offers fast read/writes, endurance and nonvolatility, but as presently implemented consumes too much power, ruling it out in most embedded and mobile devices. It has also been difficult to achieve transistor sizes  equivalent to that of current DRAMs, SRAMs or flash devices.

Both current and the newer MRAM devices based on spin-torque-transfer are based on MRAM cells that consist of a transistor and a magnetic tunnel junction (MTJ), which consists of a fixed-orientation magnetic layer and a free magnetic layer separated by a tunnel barrier. Data is written to storage by changing the magnetic orientation of the free layer.

Using magnetic-field data-writing technology, in which a magnetic field is applied to change the magnetization of the free layer, current MRAMS are capable of fast operation but have high power consumption when active.

In spin-torque-transfer MRAM, data is written by flowing spin-polarized electrons through the tunneling magnetoresistance element to change the magnetized orientation of the free layer.

Because it has no need for an external magnetic field, a spin-torque MRAM consumes less power and is more scalable than conventional MRAM.

Sony’s 4 kilobit MRAM

At the IEDM, Sony researchers said they have fabricated a 4-kbit memory cell in a 180-nanometer (1.8 micron) CMOS process with four-level metal using an optimized alloy of Cobalt, Iron and Beryllium (CoFeB), the same as used in their conventional MRAM designs, meaning there is no need to create a new process flow for the new devices.  

On the experimental devices the researchers have built, they have verified data write speeds of two nanoseconds. The current needed to switch the free layer’s orientation during the write operation is about 200 microamperes, about 1/30 th that of conventional MRAMs.

The researchers believe based on simulations they have done that MRAM densities using the new technique can be scaled to the level of current DRAM devices and beyond, depending on the materials properties as related to low power operation.

To learn more, go to www.sony.com.