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ARC Targets Java With CPU ExtensionsBy Bernard Cole At a time when major corporations are committing to Web services as a way to deliver content and services to a wide range of thin-client iAppliances, a third generation of Java hardware execution engines is beginning to appear on the market. Among the first of this new generation of hefty 32 bit RISC architectures to directly support Java execution is the ARCtangent-A4 from ARC International Ltd. (Elstree (U.K.), which has added a number of new Java hardware and instruction level extensions to its user customizable microprocessor architecture. Developed in conjunction with DCT (Digital Communications Technologies Ltd.), a Java design specialist, the new extensions add only 5,000 or so gates to a typical 40,000 gate ARCtangent integrated RISC/Java implementation. According to the company, benchmarks indicate that the new extensions delivery nearly 30 percent greater performance than its nearest competitor - with significantly less overhead. Performance has been benchmarked at about 7 CaffeineMarks per megahertz (CM/MHz). The emergence of such 32 bit RISC/Java-enabled processors is particularly important at the current stage of Web and Internet development, where there is a major shift to a Web services paradigm, in which major corporations are looking upon small footprint embedded and information-based iAppliances as platforms to which they can deliver content and services. Such an architecture also addresses a fast-growing market for small, low cost embedded Java systems, particularly in high volume consumer and multimedia applications such as mobile handsets, digital TV set-top boxes, and web pads. Unlike competing Java solutions, the ARC Java extensions are not part of a bulky Java co-processor. Instead, they are native instructions that execute Java bytecode instructions directly. They require no extra pipeline stages, minimizing latency. They require no cumbersome mode switching, because compilers and programmers can freely interleave the standard and extended ARCtangent-A4 instructions. This also allows aggressive optimisations. The ARCtangent-A4 processor with Java extensions can execute multiple Java bytecodes per clock cycle, where other solutions require multiple clock cycles per bytecode. The fact that the ARCtangent-A4 is a solid 32-bit RISC engine to which Java extensions have been added is an important differentiator in the architecture from earlier implementations. First generation Java engines and second generation Java-coprocessors focus on implementing the Java stack-oriented virtual machine in hardware. While this is an excellent way to get high performance execution of Java byte code, it resulted in less than dazzling performance when it came to executing code written in C and C++. While the new Web Services frameworks being promoted by the likes of Sun Microsystems and IBM are based on the use of the extensible markup language(XML) and Java as the common negotiating languages between distributed computing devices, the new Web environment is still a very heterogeneous one with an enormous amount of legacy applications written in C and C++. Moreover one of the major players in the Web services market will be Microsoft Corp., whose .NET framework does not include any allowances for direct execution of Java byte code. In addition to building its framework around many of the legacy languages, .NET also incorporates a new C-like language called C-sharp, which incorporates many Java-like byte execution mechanisms. In addition, it will also offer what it calls J-sharp, which allows developers to write .NET applications and services using Java language-like syntax. In such an environment, a 32 bit architecture evenly balanced between RISC, which was designed originally to execute C and C++ efficiently, and Java extensions may be the best solution, according to industry analysts. The Java extensions for the ARCtangent-A4 processor are expected to be available in Q2 2002. For more information, go to http://www.arccores.com/. |
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