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Intel Unveils New X-scale Application CPUsBy Bernard Cole San Francisco, Ca. -- At its annual Developers Forum here this week, Intel Corp. is showing off its next generation of iAppliance application processors built around new enhancements to the StrongARM core technology it acquired several years ago from the now defunct Digital Equipment Corp. DEC was an early licensee of the ARM technology which it enhanced with new process and processor innovations such as a five level pipelined architecture and large on chip data and instruction caches. Its 150 to 200 MIPS performance plus large on-chip cache size made it possible for developers to compensate for the slow execution of Java byte code by storing the Java Virtual Machine code in the instruction cache and the stack-oriented Java interpreted code in the data cache. This allowed extremely fast Java execution times because it was not necessary to travel off chip to external memory and operate at the much lower 66 to 133 MHz external bus rates. The new family of devices, from Intel, the PXA210 and PXA250 Application Processors, like the earlier SA1110, feature an enhanced core architecture, as well as process improvements that allow not only the highest performance in a CPU targeted at small footprint iappliance applications, but extremely low power as well. With the same .18 micron CMOS technology used in the X86-derived 1 GHz-plus Pentium III, IV and Itanium desktop and server processors the new devices feature a 180 to 750 MIPS (160 to 600 MHz) performance range with power requirements ranging from 40 to 450 milliwatts at .75 to 1.5 volts, well within the power budget of even the smallest iAppliances. Specifically, the new devices, the 200 MHz PXA210 and the 400 MHz PXA 250, are targeted and wireless iAppliance applications ranging wireless telephones to Internet-enabled PDAs. Intel engineers have used the higher integration possible with the .18 micron process to incorporate a wide range of peripheral functions onto the same die as the core processor, which occupies only 15 percent of the entire area of the chip. Among the peripheral functions which will be important to wireless iAppliance device builders are a universal serial bus controller, a direct memory access controller, two 1.84 MHz UARTS for Bluetooth and other wireless standards, full modem control, a liquid crystal display controller, a memory controller, interfaces for the consumer memory module cards and peripheral add-ons for PCMCIA, multimedia cards, and 802.11b wireless networking cards. In addition, the devices contain a new the new Turbo mode capability, which will allow them to scale performance as high or as low as necessary in a single in a single clock cycle, conserving battery life while still providing the necessary boosts in performance when necessary. In addition, new micro-power management features for these devices allow the new processors to potentially use less than half the power at the same performance levels of Intel StrongARM SA-1110 applications processor, which also uses the Intel-enhanced StrongARM architecture. The added performance and power savings from the new Intel processors come at a time when significant amounts of data are beginning to be processed on wireless iAppliance devices. According to Cahners In-Stat, of the 400 million handsets sold worldwide in 2001, only about two to three percent are capable of processing large amounts of information. By 2005, the analyst firm believes that more than 50 percent of the 900 million cellular phones sold will be data enabled. Both the Intel PXA250 and Intel PXA210 applications processors are available in sample quantities. The Intel PXA250 processor at 400 MHz has a suggested list price of $39.20 (USD) and the Intel PXA210 processor at 200 MHz has a suggested list price of $19 (USD) in 10,000 unit quantities. Additionally, Intel is making the Intel DBPXA250 development system, DCPXA250 daughter card and Intel XScale microarchitecture XDB Simulator 2.0 with support for the PXA250 available for rapid development and prototyping. For more information go to http://developer.intel.com/design/pca/. NEXT WEEK: After the Intel Developer's Forum this week, a detailed analysis of the underlying architecture of the new applications processors in “A View Under The Hood: Intel's PXA Architecture,” will be published on this site in the iAppliance Insights section. |
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