Hitachi's multilevel flash cell debuts in 1-Gbit chip

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iApplianceWeb
(07/11/02, 03:14:38 PM EDT)

TAIPEI, Taiwan - After several months of honing its proprietary multilevel flash cell structure, Hitachi Ltd. plans to bring the technology to market in a 1-Gbit chip capable of 10-Mbyte/second write speeds.

Hitachi first described the assist-gate-AND architecture in December at the International Electron Devices Meeting in Washington. The company hopes it will be popular among designers of high-end, high-resolution digital still cameras with video capture capabilities, as well as in mobile phones, wireless PDAs and data-storage devices for industrial uses.

The architecture helps Hitachi increase the density of multilevel cells, thus driving down cost, yet without compromising on write performance, which is still higher than for NAND flash chips on the market today.

The cell itself uses an assist-gate field isolation method that allows higher density compared to conventional shallow groove isolation. The assist gate prevents intercell interference, and when current shuts off, the gates close and isolate the adjacent floating gates. "Because you don't have to use a shallow trench oxide isolation, you can pack the cells much closer together. The improvement in performance is gained through a different programming methodology in using the cell," said Victor Tsai, product marketing manager for flash memory products at Hitachi Semiconductor America.

Instead of using Fowler-Nordheim tunneling for programming, the chip uses hot electron injection - also used in NOR-type flash memory devices. But Hitachi has added a twist to shave off write times. The electrons are injected from the source side, not from the drain side like in NOR memory, thus allowing for faster, low-current parallel writing. The writing time to one cell, normally about 10^-4 seconds in a Fowler-Nordheim tunneling cell, is reduced to 10^-5 seconds in the AG-AND cell. Fowler-Nordheim is used for erasures.

To squeeze out even more speed, the chip uses a four-bank configuration instead of one bank, which would yield only a 3 Mbyte/s write speed. At IEDM, Hitachi said the chip could peak at 20-Mbyte/s write speeds, but that is reduced when applied to a multilevel cell structure.

Flash cards will be an obvious market for the chips, which will enable 128 Mbytes of data, or roughly two hours of MP3 audio files, to be written in about 13 seconds. Cell phones will top the list of embedded applications, as 2.5G and 3G services create a need for more on-board storage of data downloads such as video clips, digital photos or MP3s files.

Current memory systems in phones cannot handle such local storage. And increasing data storage using today's memory systems, based on NOR flash and SRAM, would make them too expensive. "So a lot of these cell phone makers have been evaluating a lot of different memory systems to handle these applications as we go into this new generation of phones," Tsai said.

Hitachi's 1-Gbit product, the HN29V1G91, is housed in a 48-pin TSOP type-I package similar to Hitachi's previous 512-Mbit flash chip. The 1-Gbit chip is pin compatible with NAND interfaces, and so may be used as a drop-in replacement for NAND-based systems.

- Yoshiko Hara contributed to this report.