ARM Intros ARM11 cores, PrimeXsys support

By Bernard Cole
iApplianceWeb
(10/22/02, 02:41:44 PM EDT)

Cambridge, England --- Ltd. ha just launched the ARM11 PrimeXsys development platform for its just released Arm ll cores, the newest of which are the ARM1136J-S core and the ARM1136JF-S.

Powered by the new ARM1136J-S core, the PrimeXsys Platform provides system developers with all of the hardware, software and verification IP necessary to design a system-on-chip (SoC) solution for smart digital devices running RTOSs and open operating systems (OS) such as Linux, Palm OS v5, Symbian OS, VxWorks and Windows CE.net.

The hardware is tightly integrated with the ARM1136J-S microprocessor core and its software development tools include extendible software models of the platform that allow software designers to work in parallel with hardware development. In addition, the PrimeXsys Verification Methodology enables faster integration, verification and validation of a hardware and software system, further reducing time-to-market.

In addition to the processor, the ARM11 PrimeXsys Platform includes four 64-bit ports connected to memory controller supporting 32-bit DDR; a 32-bit private bus for peripherals only available to the ARM11 core to ensure minimum latencies' direct connection from the vectored interrupt controller into the ARM11 microprocessor's interrupt registers for faster response to interrupts; support for both synchronous and asynchronous clocking with a target bus speed of 167 MHz.

In addition to the standard development tools, the platform support for DDR, SDRAM, ROM, flash and synchronous flash memory; MBX HR-S and MBX R-S, ARM's 3D graphics engine; all the IP necessary to boot and run an OS; board support packages for Windows CE .NET and Symbian OS 7.0 and VxWorks; and a set of verification tools based on the PrimeXsys verification methodology.

The ARM1136J-S core and the ARM1136JF-S core are targeted at a wide range of consumer, and wireless iappliance applications such as set-top boxes, digital cameras, 2.5 and 3G mobile phones as well as a variety of embedded networking infrastructure applications in voice-over-IP (VoIP) equipment, broadband modems, residential gateways, WLAN access points and security devices.

The ARM11 microarchitecture features a high-performance pipeline and high-bandwidth memory system which, when combined with clock gating throughout, results in an extremely compact and power-efficient microprocessor core.

With a typical operating frequency of over 533MHz in 0.13u process, these two new cores are the only licensable microprocessor intellectual property (IP) to deliver performance of over 600 Dhrystone MIPs (un-optimized) at under 200mW.

At the heart of the new high-performance cores is an eight-stage pipeline with two-cycle cache access to enable high frequency implementation. Both cores feature a flexible, high-performance memory system with configurable instruction and data cache, plus high-speed local memory (TCM) with dedicated DMA to augment the processing of real-time data. Four high-speed 64-bit system on-chip interconnects ensure ample bandwidth for data and instructions.

The Memory Management Unit (MMU) supports leading operating systems such as Microsoft, SymbianOS, WindRiver and Linux and includes physically tagged caches -- which reduce OS context switch times, and improve processor utilization by eliminating forced cache flushing by the OS.

Ported from the earlier ARMv6 architecture are SIMD instructions to accelerate multimedia performance, such as MPEG4 encoding in software, by a factor of two over the ARMv5 architecture.

The new cores also feature improved real-time response with a low- interrupt-latency mode, vectored interrupt support and 3x times faster interrupt entry using new stack and mode-change instructions. Low-power operation is ensured by extensive clock-gating throughout the design and two low-power modes to support system-level power management.

The new 'F' extension added to the ARM1136JF-S core signifies the inclusion of a floating-point coprocessor function that, in addition to consumer and wireless applications, also makes the core highly suitable for automotive applications. Floating-point coprocessors are ideal for embedded control applications such as power train and vehicle dynamics systems, and are also a key requirement for many 3D graphics applications. Both cores include the ARM Jazelle extensions for enhanced Java acceleration and the ARM "E" extensions for DSP acceleration.

The ARM1136J-S core and the ARM1136JF-S core are delivered in a synthesizable format and are designed to work seamlessly with commercially available libraries and RAM compilers, which helps to speed up integration of the cores into system-on-chip (SoC) devices. The ARM1136J-S core and the ARM1136JF-S core deliver over 400 MHz worst-case for 160mW in a 1V, 0.13 micron process.

The ARM1136J-S core and the ARM1136JF-S core are supported by the ARM RealView development solution consisting of RealView Compilation Tools, the RealView Debugger tool, the Multi-ICE tool, RealView ICE products and RealViewTrace products.

Both the ARM11 cores and the PrimeXsys Platform are available for licensing now.

For more information, go to http://www.arm.com.

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